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Technical Data
MC44BS373CA Rev. 2.6, 6/2004 MC44BS373CA Data Sheet PLL-Tuned UHF and VHF Audio/Video High-Integration Modulator
MC44BS373CA
SO16NB Package
QFN20 Package
Ordering Information
Device MC44BS373CAD,R2 MC44BS373CAFC,R2 MC44BS373CAEF,R2 Temp Range -20 to +85C -20 to +85C -20 to +85C Package SO16NB QFN20 Lead Free SO16NB Lead Free
NOTE: For tape and reel, add R2 suffix.
Contents
1 Features . . . . . . . . . . . . . . . . . . . . . . 2 2 Comparing the MC44BS373CA to the MC44BC373/4C. . . . . . . . . . . . . . . . . 2 3 Pin Descriptions. . . . . . . . . . . . . . . . . 3 4 MC44BS373CA Functional Overview 5 5 Maximum Ratings . . . . . . . . . . . . . . . 6 6 Thermal Ratings . . . . . . . . . . . . . . . . 6 7 Electrostatic Discharge . . . . . . . . . . . 7 8 Electrical Characteristics . . . . . . . . . . 7 9 I2C Bit Mapping . . . . . . . . . . . . . . . . . 8 10 I2C Programming . . . . . . . . . . . . . . 10 11 Modulator High-Frequency Characteristics . . . . . . . . . . . . . . . . . 13 12 Video Characteristics. . . . . . . . . . . . 14 13 Audio Characteristics. . . . . . . . . . . . 16 14 Characterization Measurement Conditions . . . . . . . . . . . . . . . . . . . . 17 15 MC44BS373CA Modes of Operation 22 16 High Speed I2C Compatible Bus. . . 27 17 Pin Circuit Schematics. . . . . . . . . . . 31 18 Application Diagrams. . . . . . . . . . . . 32 19 MC44BS373CA Evaluation Board Schematic and Layout . . . . . . . . . . . 36 20 Packaging Instructions . . . . . . . . . . 41 21 Marking Instructions . . . . . . . . . . . . 42 22 Case Outlines . . . . . . . . . . . . . . . . . 43 23 Document Revision History . . . . . . . 48
The MC44BS373CA audio and video modulator is for use in VCRs, set-top boxes, and similar devices. * * * Supports multiple standards TV output level 82 dBV typical 5- and 3.3-V compatible I2C bus
Figure 1 shows the pin connections for both package options.
PLLFLT GNDD
18
SCL SDA
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
GNDD VCCD PLLFLT TVOVCC TVOUT GND VCCA VIDEO
LOP CAS
XTAL GND PREEM
1 2 3 4 5
20
19
VCCD
SDA
SCL
17 16
15 14 13 12 11
TVOVCC TVOUT NC GND NC
LOP
XTAL GND PREEM AUDIO SPLLFLT
6
7
8
9
10
AUDIO
SPLLFLT
AUXIN
VIDEO
SO16NB Package
QFN20 Package
Figure 1. MC44BS373CA Pin Connections
VCCA
Features
1 Features
The MC44BS373CA is a multi-standard, PAL/SECAM/NTSC modulator. The channel is set by an on-chip high-speed I2C-compatible bus receiver. A phase-locked loop (PLL) tunes the modulator over the full UHF range. The modulator incorporates a sound subcarrier oscillator and uses a second PLL to derive 4.5-, 5.5-, 6.0-, and 6.5-MHz subcarrier frequencies. These frequencies are selectable by bus. The modulation standard can be chosen using a control bit that selects between positive and negative modulation. The picture-to-sound ratio may be adjusted using the bus. In addition, an on-chip video test pattern generator can be switched on with a 1-kHz audio test signal. The MC44BS373CA also has the following features: * * * * * * * * * * * * * * * * * * * * Integrated on-chip programmable UHF oscillator No external varicaps diodes/inductor or tuned components Extremely low external component count Channel 21-69 UHF operation VHF range possible by internal dividers (30-450 MHz) Boosted TVOUT level (82 dBV typical) High-speed read and write I2C bus compatible (800 kHz) I2C address selectable by pin (four choices) using external resistor (available only in QFN20 package) I2C bus 5- and 3.3-V compatible Fixed video modulation depth (93% typical in system L and 82% typical in the other standards) Peak white clip disabled by bus Programmable picture/sound carrier ratio (12 and 16 dB) Integrated on-chip programmable sound subcarrier oscillator (4.5, 5.5, 6.0 and 6.5 MHz)--no external varicaps Programmable sound reference frequency (31.25 and 62.5 kHz) Direct RF sound modulator input (FM and AM modulator bypassed) for NICAM or stereo sound applications (available only in QFN20 package) On-chip video test pattern generator with sound test signal (1 kHz) Low-power programmable modulator standby mode Transient output inhibit during PLL lock-up at power-on Logical output port controlled by bus ESD protection, minimum 4 KV
2 Comparing the MC44BS373CA to the MC44BC373/4C
Compared to the MC44BC373/4C devices, the MC44BS373CA has the following improvements: * * Higher output level (82 versus 74.5 dBV) Higher video signal to noise (+3 dB)
MC44BS373CA Data Sheet
Pin Descriptions
* * * * * * * * *
I2C bus 3.3-V compatible Lower power consumption in normal and standby modes (-2 mA) Can be powered down without holding down I2C lines TB1 bit no longer available (limited compatibility with MC44355 devices no longer available) New SREF bit to program sound reference frequency (31.25 and 62.5 kHz) Four different I2C addresses selectable by single pin with external resistor (available only in QFN20 package) Direct sound RF modulator (FM and AM sound modulators bypassed) for NICAM or stereo sound applications (available only in QFN20 package) Switch between two integrated VCOs controlled directly by frequency divider (at 700 MHz) Lower RF second harmonic spurious but higher third harmonic spurious. In applications it is easier to filter UHF third harmonics spurious than second harmonics, as these frequencies are always out of the UHF band. Unfortunately, the second harmonic can fall back into the same UHF band (for instance channel 21 second harmonic). For this reason, it is almost impossible to have a good rejection of low UHF second harmonic with an external low-pass filter. This is why the design has been optimized for maximum second harmonic rejection in spite of an increase in the third harmonic level.
3 Pin Descriptions
This section describes the pins of the MC44BS373CA. First the 16-pin package will be considered, then the 20-pin package.
3.1 SO16 Package Pin Descriptions
The pins of the 16-pin package are listed in Table 1, along with a description of each.
Table 1. SO16 Package Pin Descriptions
Pin 1 2 3 4 5 6 7 8 Name SCL SDA LOP XTAL GND PREEM AUDIO I2C clock I2C data Logical output port controlled by I2C bus Crystal Ground Pre-emphasis capacitor Audio input Description Pin 9 10 11 12 Name VIDEO VCCA GND TVOUT Video input Main analog supply voltage Analog ground TV output signal Description
13 TVOVCC TV output stage supply voltage 14 15 16 PLLFLT VCCD GNDD RF PLL loop filter Digital supply voltage Digital ground
SPLLFLT Sound PLL loop filter
MC44BS373CA Data Sheet
Pin Descriptions
3.2 QFN20 Package Pin Descriptions
The pins of the 20-pin package are listed in Table 2, along with a description of each.
Table 2. QFN20 Package Pin Descriptions
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name LOP CAS XTAL GND PREEM AUDIO SPLLFLT AUXIN VIDEO VCCA NC GND NC TVOUT TVOVCC PLLFLT VCCD GNDD SCL SDA Description Logical output port controlled by I2C bus Chip address selection (external pull-down resistor or open) Crystal Ground Pre-emphasis capacitor Audio input Sound PLL loop filter Sound auxiliary input (sound FM and AM modulators bypassed) Video input Main analog supply voltage Not connected Analog ground Not connected TV output signal TV output stage supply voltage RF PLL loop filter Digital supply voltage Digital ground I2C clock I2C data
MC44BS373CA Data Sheet
MC44BS373CA Functional Overview
4 MC44BS373CA Functional Overview
Figure 2 shows a simplified block diagram of the MC44BS373CA.
LOP Peak White Clip L /BG VIDEO SPLLFLT MODULATOR SECTION
I2C BUS Video Modulator
Clamp
31.25/62.5 kHz Sound PFD Sound Oscillator and FM Modulator Audio Amplifier
AUDIO PREEM
L/BG
TVOVCC TVOUT
75
LPF
Prog Divider
VCCA LPF ALC GND GND
I2C BUS
I2C BUS
FM AM
LPF
L/BG AM Modulator AUXIN (only in QFN 20)
RF Sound Modulator BUS SECTION
CAS (only in QFN 20) SCL SDA
VHF Dividers
VCO and PLL SECTION PLL
I2C BUS
High Speed I2C Bus Receiver
UHF OSC Prescaler/8 I2C BUS Prog Divider
Phase Comp
Ref Divider /128
4-MHz XCO
31.25 kHz PLLFLT XTAL
VCCD
GNDD
Figure 2. MC44BS373CA Simplified Block Diagram
The MC44BS373CA device has three main sections: * * * A high-speed I2C-compatible bus section A PLL section to synthesize the UHF/VHF output channel frequency (from an integrated UHF oscillator, divided for VHF output) A modulator section, which accepts audio and video inputs, then uses them to modulate the UHF/VHF carrier
An on-chip video test pattern generator with an audio test signal is included. The MC44BS373CA operates as a multi-standard modulator and can handle the following systems using the same external circuit components: B/G, I, D/K, L, M/N. High-frequency BiCMOS technology allows integration of the UHF tank circuit and certain filtering functions.
MC44BS373CA Data Sheet
Maximum Ratings
5 Maximum Ratings
Table 3 lists the maximum ratings supported for operating conditions of the MC44BS373CA. NOTE This device contains protection circuitry to guard against damage due to high-static voltage or electric fields. However, precautions must be taken to avoid applications of any voltages higher than maximum rated voltage to this high-impedance circuit. For proper operation, input and output voltages should be constrained to the ranges indicated in the recommended operating conditions.
Table 3. Maximum Ratings 1
Symbol VCC Tamin Tamax Tstgmin Tstgmax Tj
1
Parameter Supply voltage Minimum operating ambient temperature Maximum operating ambient temperature Minimum storage temperature Maximum storage temperature Junction temperature
Value 6 -20 +85 -65 150 150
Unit V C C C C C
Maximum ratings are those values beyond which damage to the device may occur. For functional operation, values should be restricted to the recommended operating conditions.
Moisture sensitivity level ratings for the different packages are given in Table 4.
Table 4. Moisture Sensitivity Level Ratings (MSL)
Package MC44BS373CAD,R2 MC44BS373CAFC,R2 lead free packages MC44BS373CAEF,R2 lead free packages Rating 1 3 3 Dry Pack Required No Yes Yes
6 Thermal Ratings
Table 5 lists the junction-to-ambient thermal resistance for both packages.
Table 5. Thermal Resistance from Junction to Ambient
Symbol Rthja Rthja SO16NB QFN20 Package Value 102 120 Unit C/W C/W
MC44BS373CA Data Sheet
Electrostatic Discharge
7 Electrostatic Discharge
Electrostatic discharge (ESD) tests are carried out on all pins using MIL STD 883C method 3015-7. Results are shown in Table 6.
s
Table 6. Electrostatic Discharge Tests
Symbol ESD ESD Parameter MM (machine model) HBM (human body model) Minimum 400 4000 Unit V V
8 Electrical Characteristics
Each of the operating conditions listed in Table 7 is characterized as one of the following types: * * * * A--100% tested B--100% correlation tested C--Characterized on samples D--Design parameter
See Section 14, "Characterization Measurement Conditions," for each C-type parameter.
8.1 Operating Conditions
Unless otherwise stated, VCC = 5.0V, ambient temperature = 25C, and video input is 1 Vp-p, with 10-step grey scale and RF output into 75- load. NOTE Specifications are only valid for envelope demodulation.
Table 7. Operating Conditions
Parameter Operating supply voltage range Total supply current
1
Condition -- -- -- -- During locking When locked
Minimum Typical Maximum Unit Type Notes 4.5 42 3 3 7 0.7 60 1 -- -- 5.0 50 5 4.7 10 1 100 -- 160 -- 5.5 58 7 6.5 12 1.5 150 -- 300 1 A K mV A A D A V mA mA S A B A A B A 1 2
Total standby mode supply current 2 Test pattern sync pulse width Sound comparator charge pump current
RF comparator charge pump current Crystal oscillator stability-negative resistance Logic output port saturation voltage at I = 2 mA Logic output port leakage current
1 2
-- -- -- --
All sections active OSC = SO = ATT = 1, bus section active. See Section 15.3, "Standby Mode."
MC44BS373CA Data Sheet
I2C Bit Mapping
9 I2C Bit Mapping
Table 8. I2C Write-Mode Bit Mapping
Write Mode Chip address C1--High-order bits C0--Low-order bits FM--High-order bits FL--Low-order bits Bit 7 1 1 PWC 0 N5 Bit 6 1 0 OSC TPEN N4 Bit 5 0 SO ATT N11 N3 Bit 4 0 LOP SFD1 N10 N2 Bit 3 1 PS SFD0 N9 N1 Bit 2 Bit 1 Bit 0 0 SYSL X4 N6 X0 ACK ACK ACK ACK ACK ACK
See Table 11. X3 SREF N8 N0 X2 X5 N7 X1
Table 9. I2C Read-Mode Bit Mapping
Read Mode Chip address R--Status byte Bit 7 1 -- Bit 6 1 -- Bit 5 0 -- Bit 4 0 -- Bit 3 1 -- Bit 2 Bit 1 Bit 0 1 OOR ACK ACK --
See Table 12. Y2 Y1
Table 10. I2C Bit Mapping Bit Descriptions
Name SO Description Sound oscillator on/off 0 Sound oscillator on (normal mode) 1 Sound oscillation disabled (oscillator and PLL section bias turned off) Logic output port 0 LOP pin is low voltage. 1 LOP pin is high impedance. Picture-to-sound carrier ratio 0 Picture-to-sound carrier ratio is 12 dB. 1 Picture-to-sound carrier ratio is 16 dB. Test mode bits Note: All bits are 0 for normal operation. For further information, see Table 17 and Table 18. System L enable--Selects AM sound and positive video modulation 0 System B/G enabled, system L disabled (FM sound and negative video modulation) 1 System L enabled, system B/G disabled (AM sound and positive video modulation) Peak white clip enable/disable 0 Peak white clip on (system B/G) 1 Peak white clip off (system L) UHF oscillator on/off 0 Normal operation 1 UHF oscillator disabled (oscillator and PLL sections bias turned off) Modulator output attenuated-sound and video modulators on/off 0 Normal operation 1 Modulator output attenuation (sound and video modulators sections bias turned off)
LOP
PS
X0-X5 SYSL
PWC
OSC
ATT
MC44BS373CA Data Sheet
I2C Bit Mapping Table 10. I2C Bit Mapping Bit Descriptions (continued)
Name SFD1 SFD0 Sound subcarrier frequency control bits SFD1 SFD0 Frequency 0 0 4.5 0 1 5.5 1 0 6.0 1 1 6.5 Sound PLL reference frequency 0 Sound reference frequency = 31.25 kHz 1 Sound reference frequency = 62.5 kHz Test pattern enable-picture and sound 0 Test pattern signal off (normal operation) 1 Test pattern signal on (picture and sound) UHF frequency programming bits, in steps of 250 kHz See Section 15.7, "UHF PLL Section," for more information. RF oscillator operating range information 0 High VCO is active. 1 Low VCO is active. RF oscillator operating range information 0 VCO out of range, frequency too low. Only valid if OOR=1 1 VCO out of range, frequency too high. Only valid if OOR=1 RF oscillator out-of-frequency range information 0 Normal operation, VCO in range 1 VCO out of range Description
SREF
TPEN
N0-N11 Y2
Y1
OOR
Table 11 and Table 12 show how to select the I2C address. NOTE The I C address is also selectable via the CAS pin. See Section 16, "High Speed I2C Compatible Bus," for more information.
2
Table 11. I2C Address Selection, Write Mode
SFD1 0 1 0 1 SFD0 0 0 1 1 Address Selected Binary 1100_1000 1100_1010 1100_1100 1100_1110 Hex 0xC8 0xCA 0xCC 0xCE
Table 12. I2C Address Selection, Read Mode
SFD1 0 1 0 1 SFD0 0 0 1 1 Address Selected Binary 1100_1001 1100_1011 1100_1101 1100_1111 Hex 0xC9 0xCB 0xCD 0xCF
MC44BS373CA Data Sheet
I2C Programming
10 I2C Programming
The following tables list, by category, the bits used to program various parameters of the MC44BS373CA.
10.1 Sound Settings
Table 13 lists the sound settings used.
Table 13. Sound Settings
Bit Value Setting Sound Subcarrier Frequency (MHz) SFD1 SFD0 SFD1 0 0 1 1 SFD0 0 1 0 1 Picture-to-Sound Ratio (dB) PS 0 1 Sound Oscillator SO 0 1 Sound oscillator on (normal mode) Sound oscillation disabled (oscillator and PLL section bias turned off) 12 16 4.5 5.5 6.0 6.5
Table 14 lists the video settings used.
Table 14. Video Settings
Bit Value System L/BG Selection SYSL 0 1 System B/G enabled, system L disabled (FM sound and negative video modulation) System L enabled, system B/G disabled (AM sound and positive video modulation) Peak White Clip PWC 0 1 Peak white clip on (system B/G) Peak white clip off (system L) Test Pattern Signal TPEN 0 1 Test pattern signal off (normal operation) Test pattern signal on (picture and sound) Setting
MC44BS373CA Data Sheet
I2C Programming
Table 15 lists the UHF settings used.
Table 15. UHF Settings
Bit Value UHF Oscillator OSC 0 1 Normal operation UHF oscillator disabled (oscillator and PLL sections bias turned off) Modulator Output Attenuation ATT 0 1 Normal operation Modulator output attenuation (sound and video modulators sections bias turned off) Setting
Table 16 lists the other settings used.
Table 16. Other Settings
Bit Value Sound PLL SREF 0 1 Sound reference frequency = 31.25 kHz. Sound reference frequency = 62.5 kHz. Logic Output Port LOP 0 1 LOP pin is low voltage. LOP pin is high impedance. Standby Mode OSC SO ATT 1, 1, 1 Puts the MC44BS373CA into standby mode. See Section 15.3, "Standby Mode," for more information. Setting
Table 17 lists settings of fields X2, X1, and X0, used to set the device into test mode 1 and to control the VHF range. NOTE Test modes 1 and 2 are intended for manufacturing test purposes only and cannot be used for normal applications, except for VHF range (states 1.b to 1.e).
Table 17. Write Mode--Test Mode 1 and VHF Range
X2 0 0 0 0 1 X1 0 0 1 1 0 X0 0 1 0 1 0 State 1.a 1.b 1.c 1.d 1.e Normal operation RF frequency divided for low-frequency testing or VHF range: RF/2 RF/4 RF/8 RF/16 Description
MC44BS373CA Data Sheet
I2C Programming Table 17. Write Mode--Test Mode 1 and VHF Range (continued)
X2 1 1 1 X1 0 1 1 X0 1 0 1 State 1.f 1.g 1.h Description DC drive applied to modulators--Non-inverted video at TVOUT DC drive applied to modulators--Inverted video at TVOUT Transient output inhibit disabled (that is, speed-up mode) During this speed-up test mode, ATT = 0 forces sound current source to 1 A, while ATT = 1 forces it to 10 A.
Table 18 lists settings of fields X5, X4, and X3, used to set the device into test mode 2.
Table 18. Write Mode--Test Mode 2
X5 0 0 0 0 1 X4 0 0 1 1 0 X3 0 1 0 1 0 State 2.a 2.b 2.c 2.d 2.e Normal operation Test pattern generator DC verification (test pattern DC test mode available) Program divider test (UHF program divider on PLLFILT pin and sound program divider on SPLLFIL pin) Reference divider test (UHF reference divider on PLLFILT pin) UHF phase comparison, upper source on PLLFILT pin Sound phase comparison 10-A upper source on SPLLFIL (only valid during transient output inhibit) UHF phase comparison, lower source on PLLFILT pin Sound phase comparison 10-A lower source on SPLLFIL (only valid during transient output inhibit) Sound phase comparison 1-A upper source on SPLLFIL (not valid during transient output inhibit) Sound phase comparison 1-A lower source on SPLLFIL (not valid during transient output inhibit) Description
1
0
1
2.f
1 1
1 1
0 1
2.g 2.h
Table 19 lists settings of fields Y2, Y1, and OOR, used to set the device into READ mode and to determine RF oscillator out-of-frequency range information.
Table 19. Read Mode
Bit OOR Value 0 1 Y1 0 1 Y2 0 1 Setting Normal operation, VCO in range VCO out of range VCO out of range, frequency too low. Only valid if OOR=1 VCO out of range, frequency too high. Only valid if OOR=1 High VCO is active. Low VCO is active.
MC44BS373CA Data Sheet
Modulator High-Frequency Characteristics
11 Modulator High-Frequency Characteristics
Each of the characteristics listed in Table 20 is classified as one of the following types: * * * * A--100% tested B--100% correlation tested C--Characterized on samples D--Design parameter
See Section 14, "Characterization Measurement Conditions," for each C-type parameter. Unless otherwise stated, VCC = 5.0V, ambient temperature = 25C, and video input is 1 Vp-p, with 10-step grey scale and RF output into 75- load. NOTE Specifications only valid for envelope demodulation.
Table 20. High-Frequency Characteristics
Parameter TVOUT output level UHF oscillator frequency VHF range TVOUT output attenuation Sound subcarrier harmonics (Fp + n x Fs) Second harmonic of chroma subcarrier Test Conditions Output signal from modulator section -- From UHF oscillator internally divided During transient output inhibit, or when ATT bit is set to 1 Reference picture carrier Using red EBU bar Min 79 460 45 65 50 45 65 -- -- Typ 82 -- -- 75 63 70 82 38 58 Max 85 880 460 -- -- -- -- 50 70 -- -- -- 10 dBV C 2 1 Unit dBV MHz MHz dBc dBc dBc dBc dBV Type Notes B A B B C C C C 1, 2 1 1 1 1,3 1, 2
Chroma/sound intermodulation: Using red EBU bar Fp + (Fsnd - Fchr) Fo (picture carrier) harmonics 2nd harmonic: CH21 3rd harmonic: CH21 Other channels Out-of-band (picture carrier) spurious In-band spurious (Fo at 5 MHz) 1/2 x Fo - 1/4 x Fo - 3/2 x Fo - 3/4 x Fo From 40 MHz to 1 GHz. No video sound modulation.
65
75
--
dBc
C
1
Notes: 1. See Section 14, "Characterization Measurement Conditions." 2. See Figure 3. 3. Picture carrier harmonics are highly dependent on PCB layout and decoupling capacitors.
MC44BS373CA Data Sheet
Video Characteristics
2Fo Harmonics
75 70 65 75 70
3Fo Harmonics
Maximum specification
dBuV
65 60 55 50 45 40 35
Maximum specification
dBuV
60 55 50 45 40 35 471 521 571 621 671 721 771 821 871
Typical
Typical
471
521
571
621
671
721
771
821
871
Frequency (Mhz)
Frequency (Mhz)
TV Output Level
87
TV Output Attenuation
85 80 75
Maximum specification
85 83 81
Typical
dBuV
dBc
Typical Minimum specification
70 65 60 55 471
79 77 471
Minimum specification
521
571
621
671
721
771
821
871
521
571
621
671
721
771
821
871
Frequency (Mhz)
Frequency (Mhz)
Figure 3. Typical High-Frequency Performance
12 Video Characteristics
Each of the characteristics listed in Table 21 is classified as one of the following types: * * * * A--100% tested B--100% correlation tested C--Characterized on samples D--Design parameter
See Section 14, "Characterization Measurement Conditions," for each C-type parameter. Unless otherwise stated, VCC = 5.0V, ambient temperature = 25C, and video input is 1 Vp-p, with 10-step grey scale and RF output into 75- load. NOTE Specifications are only valid for envelope demodulation.
Table 21. Video Performance Characteristics
Parameter Video bandwidth Video input level Video input current Test Conditions Reference 0 dB at 100 kHz, measured at 5 MHz. 75- load Minimum -1.5 -- -- Typical -0.8 -- 0.2 Maximum -- 1.5 1 Unit dB VCVBS A Type Notes C D A 1
MC44BS373CA Data Sheet
Video Characteristics Table 21. Video Performance Characteristics (continued)
Parameter Video input impedance Peak white clip Video S/N Video modulation depth for video = 1.4 VCVBS Using CCIR Rec.567 weighting filter Unweighted Differential phase Differential gain Luma/Sync ratio PAL video modulation depth (SYSL = 0) SECAM video modulation depth (SYSL = 1) Notes: 1. See Section 14, "Characterization Measurement Conditions." 2. See Figure 4.
Video Signal to Noise (w ith CCIR Weighting filter)
Test Conditions
Minimum 500 90.5
Typical -- 94
Maximum -- 97.5
Unit K %
Type Notes A B
No sound modulation,100% white video 53 48 -5 -5 6.8/3.2 76 87 56 53 -- -- 7.0/3.0 82 93 -- -- 5 5 7.2/2.8 88 99 deg % -- % % dB C C C C B B B 1, 2 1, 2 1, 2 1 1 1
CCIR test line 330, worst case from first 4 steps out of 5 CCIR test line 330, worst case from first 4 steps out of 5 Input ratio 7.0:3.0
62 60 58
Typical
dB
56 54 52 50 48 471 521 571 621 671 721 771 821 871
Minimum specification
Frequency (Mhz)
PAL Video Modulation Depth
90 88 86 84 102 100
SECAM Video Modulation Depth
Maximum specification
98 96
Maximum specification Typical
%
82 80 78 76 74 471
Typical Minimum specification
521 571 621 671 721 771 821 871
%
94 92 90 88 86 84 471
Minimum specification
521
571
621
671
721
771
821
871
Frequency (Mhz)
Frequency (Mhz)
Figure 4. Typical Video Performance
MC44BS373CA Data Sheet
Audio Characteristics
13 Audio Characteristics
Each of the characteristics listed in Table 22 is classified as one of the following types: * * * * A--100% tested B--100% correlation tested C--Characterized on samples D--Design parameter
See Section 14, "Characterization Measurement Conditions," for each C-type parameter. Unless otherwise stated, VCC = 5.0V, ambient temperature = 25C, and video input is 1 Vp-p, with 10-step grey scale and RF output into 75- load. NOTE Specifications are only valid for envelope demodulation.
Table 22. Audio Performance Characteristics 1
Parameter Picture-to-sound ratio Test Conditions PS bit set to 1 PS bit set to 0 Audio modulation depth Minimum Typical Maximum Unit Type 13 9 16 12 19 15 dB B
Using specific pre-emphasis circuit, audio input level = 205 mVrms, audio frequency = 1 kHz AM modulation: SECAM Fs=6.5MHz FM modulation: Fs=5.5, 6, or 6.5 MHz 100% modulation = 50 kHz FM deviation FM modulation: NTSC Fs=4.5MHz 100% modulation = 25 kHz FM deviation 76 76 76 45 -2.0 80 80 80 53 -- 84 84 84 61 +2.0 % % % K dB B B B A C
Audio input resistance Audio frequency response Reference 0dB at 1kHz using specified pre-emphasis circuit, measured from 50 Hz to 15 kHz (depends on loop filter components) Audio distortion FM (THD only) Audio distortion AM (THD only) Audio S/N with sync buzz FM Audio S/N with sync buzz AM At 1 kHz, 100% modulation (50 kHz) No video At 1 kHz, 100% modulation No video Ref 1 kHz, 50% modulation (25 kHz) EBU color bars video signal, using CCIR 468-2 weighting filter Reference 1kHz, 85% modulation Video input EBU color bar 75% Audio BW 40Hz-15kHz, using CCIR 468-2 weighting filter
-- -- 50
0.2 1.5 54
0.8 2.5 --
% % dB
C D C
45
50
--
dB
D
1
See Section 14, "Characterization Measurement Conditions."
MC44BS373CA Data Sheet
Characterization Measurement Conditions
FM Audio Weighted Signal to Noise
58 56
Typical
54
dB
52 50 48 46 471 521 571 621 671 721 771 821 871
Minimum specification
Frequency (Mhz)
Figure 5. Typical Audio Performance
14 Characterization Measurement Conditions
Table 23 shows the MC44BS373CA default configuration unless otherwise specified.
Table 23. Device Default Configuration
Device Feature Peak white clip UHF oscillator Sound and video modulators Sound subcarrier frequency Sound oscillator Sound PLL reference frequency Logic output port Picture-to-sound carrier ratio System L Test pattern All test mode bits Frequency Enabled On On 5.5 MHz On 31.25 kHz Low 12 dB Disabled Disabled Zero From channel 21 to 69 Default Setting
RF inputs/output into 75- load using a 75- to 50- transformation. Video input 1 Vp-p. Audio pre-emphasis circuit enabled.
Table 24. Measurement Conditions
Device and Signal Set-Up Measurement Set-Up TVOUT Output Level Video: 10-step grey scale No audio Measured picture carrier in dBV with the HP8596E spectrum analyzer using a 75- to 50- transformation, all cable losses and transformation pads having been calibrated. Measurement used as a reference for other tests: TVout_Ref
MC44BS373CA Data Sheet
Characterization Measurement Conditions Table 24. Measurement Conditions (continued)
Device and Signal Set-Up Measurement Set-Up TVOUT Output Attenuation ATT bit = 1 No video signal No audio signal Measure in dBc picture carrier at ATT = 1 with reference to picture carrier at ATT = 0 Sound Subcarrier Harmonics Video: 10-step grey scale No audio signal Measure in dBc second and third sound harmonics levels in reference to picture carrier (TVout_Ref).
Picture Carrier Sound Carrier
Sound 2nd Harmonic Sound 3rd Harmonic Fo +5.5MHz +11MHz +16.5MHz
Second Harmonics of Chroma Subcarrier No audio Measure in dBc, in reference to picture carrier (TVout_Ref), second Video: a 700-mVp-p, 100-kHz sinusoidal harmonic of chroma at channel frequency plus two times chroma signal is inserted on the black level of active frequency, resulting in the following spectrum. video area.
Picture Carrier Frequency Frequency 100kHz 100 kHz 700 mVp-p
700mV pk-pk
Chroma Carrier
Sound Carrier Chroma 2nd Harmonic
Fo
+4.43 MHz +5.5 MHz
+8.86 MHz
Chroma/Sound Intermodulation No audio signal Video: a 700-mVp-p, 100-kHz sinusoidal signal is inserted on the black level of active video area.This is generated using a Rohde & Schwarz video generator SAF and inserting the required frequency from an RF signal generator.
Frequency Frequency 100kHz 4.43 MHz 700 mVp-p
700mV pk-pk
Measure in dBc, in reference to picture carrier (TVout_Ref), intermodulation product at channel frequency plus the sound carrier frequency (+5.5 MHz) minus the chroma frequency (-4.43 MHz), resulting in the following spectrum (Intermodulation product is at the channel frequency +1.07 MHz):
Picture Carrier Chroma Carrier Chroma/Sound Intermodulation Sound Carrier
Fo
+1.07MHz
+4.43 MHz +5.5 MHz
MC44BS373CA Data Sheet
Characterization Measurement Conditions Table 24. Measurement Conditions (continued)
Device and Signal Set-Up Measurement Set-Up Picture Carrier Harmonics No video signal No audio signal Measure in dBc, in reference to picture carrier (TVout_Ref), second and third harmonic of channel frequency, resulting in the following spectrum
.
Picture carrier
2nd harmonic
3rd harmonic
Fo
2Fo
3Fo
Out-of-Band Spurious No video signal No audio signal Measure in dBV spurious levels at 0.25, 0.5, 0.75 and 1.5 times channel frequency, resulting in the following spectrum (measure from 40 MHz to 1 GHz):
Picture carrier
Spurious
Fo/4
Fo/2
Fox3/4
Fo
Fo x 3/2
In-Band Spurious No video signal No audio signal Measure in dBc, in reference to picture carrier (TVout_Ref), spurious levels falling into video bandwidth starting from 100 kHz from the picture carrier up to 5MHz. Video Bandwidth No audio Video: 600-mVp-p sinusoidal signal inserted on the black level of active video area The video signal is demodulated on the spectrum analyzer, and the peak level of the 100-kHz signal is measured as a reference. The frequency is then swept from 100 kHz to 5 MHz, and then the difference in dB from the 100-kHz reference level is measured. Weighted Video Signal to Noise Video: 100% white video signal, 1 Vp-p. No audio signal This is measured using a Rohde & Schwarz AMFS UHF demodulator in B/G (using a CCIR Rec. 567 weighting network), 100-kHz to 5-MHz band with sound trap and envelope detection, and a Rohde & Schwarz UAF video analyzer. The video analyzer measures the ratio between the amplitude of the active area of the video signal (700 mV) and the noise level in Vrms on a video black level which is shown below. Video S/N is calculated as 20 x log(700/N) in dB.
N noise level in Vrms
MC44BS373CA Data Sheet
Characterization Measurement Conditions Table 24. Measurement Conditions (continued)
Device and Signal Set-Up Measurement Set-Up Unweighted Video Signal to Noise Same as above with CCIR filter disabled Same as above Video Differential Phase Video: 5-step grey scale, 1 Vp-p No audio signal This is measured using a Rohde & Schwarz AMFS UHF demodulator in B/G (using a CCIR Rec. 567 weighting network), 100-kHz to 5-MHz band with sound trap and envelope detection, and a Rohde & Schwarz UAF video analyzer. On line CCIR 330, the video analyzer DP measure consists of calculating the difference of the chroma phase at the black level and the different chroma subcarrier phase angles at each step of the grey scale. The largest positive or negative difference indicates the distortion. Diff Phase = Largest positive or negative difference Phase at position 0
x 100%
The video analyzer method takes the worst step from the first 4 steps. Video Differential Gain
Video: 5-step grey scale, 1 Vp-p No audio signal This is measured using a Rohde & Schwarz AMFS UHF demodulator in B/G (using a CCIR Rec. 567 weighting network), 100-kHz to 5-MHz band with sound trap and envelope detection, and a Rohde & Schwarz UAF video analyzer.
On line CCIR 330 shown below, the video analyzer DG measure consists of calculating the difference of the chroma amplitude at the black level and the different amplitudes at each step of the grey scale. The largest positive or negative difference indicates the distortion.
0
1
3 2 4
5
5-Step Grey Scale with Chroma Subcarrier Superimposed (Not to Scale), Line CCIR 330
Diff Gain =
Largest positive or negative difference Amplitude at position zero
x 100%
The video analyzer method takes the worst step from the first 4 steps. Video Modulation Depth No audio signal Video: 10-step grey scale This is measured using an HP8596E spectrum analyzer with a TV trigger option, allowing demodulation and triggering on any specified TV line. The analyzer is centred on the maximum peak of the video signal and reduced to 0 Hz span in linear mode to demodulate the video carrier
.
A ((mV) A 6-10mV)
B (0.6 - 3mV)
B (mV)
TV Line Demodulated by Spectrum Analyzer--BG Standard
The modulation depth is calculated as (A - B) / A x 100 in percent. Same measurement method for L standard, with inverted video.
MC44BS373CA Data Sheet
Characterization Measurement Conditions Table 24. Measurement Conditions (continued)
Device and Signal Set-Up Measurement Set-Up Picture-to-Sound Ratio No video signal No audio signal PS bit set to 0 and 1 Measure in dBc sound carrier in reference to picture carrier (TVout_Ref) for PS bit = 0 (PS = 12 dB typical) and for PS bit = 1 (PS = 16 dB),
Picture Carrier
Sound Carrier
Fo
+5.5 MHz
Audio Modulation Depth--FM Modulation Video black level Audio signal: 1 kHz, 205 mVrms. This is measured using a Rohde & Schwarz AMFS demodulator in B/G and an HP8903A audio analyzer at 1 kHz. The audio signal, 205 mV at 1 kHz, is supplied by the audio analyzer, and the FM demodulated signal deviation is indicated on the demodulator in kHz peak. This value is then converted into percentage of FM deviation, based on specified standards. Audio Frequency Response Video black level Audio signal: 50 Hz to 15 kHz, 100 mVrms This is measured using a Rohde & Schwarz AMFS demodulator in B/G and an HP8903A audio analyzer. The audio signal, 1 kHz 100 mVrms, is supplied by the audio analyzer, and demodulated by the demodulator. The audio analyzer measures the AC amplitude of this demodulated audio signal. This value is taken as a reference (0 dB). The audio signal is then swept from 50 Hz to 15 kHz and demodulated. AC amplitude is measured in dB relative to the 1-kHz reference. Audio pre-emphasis and de-emphasis circuits are engaged and all audio analyzer filters are switched off. Audio Distortion FM Audio: 1 kHz, adjustable level Video black level This is measured using a Rohde & Schwarz AMFS UHF demodulator in B/G and an HP8903A audio analyzer at 1 kHz. The output level of the audio analyzer is varied to obtain a deviation of 50 kHz indicated on the demodulator. The input arms detector of the audio analyzer converts the AC level of the combined signal + noise + distortion to DC. It then removes the fundamental signal (1 kHz) after having measured the frequency. The output rms detector converts the residual noise + distortion to DC. The DC voltmeter measures both DC signals and calculates the ratio of the two signals as a percentage. ADist = ( Distortion + Noise ) ( Distortion + Noise + Signal ) Audio Signal to Noise Audio: 1 kHz, adjustable level Video: EBU color bars This is measured using a Rohde & Schwarz AMFS demodulator in B/G and an HP8903A audio analyzer at 1 kHz. The output level of the audio analyzer is varied to obtain a modulation deviation of 25 kHz indicated on the AMFS demodulator. The audio analyzer alternately turns on and off its internal audio source to make a measure of the audio signal plus noise and then another measure of only the noise. The measurement is made using the internal CCIR 468-2 filter of the audio analyzer together with the internal 302-kHz (60 dB/decade) low-pass filters. The AMFS demodulator uses a quasi-parallel demodulation as is the case in a normal TV set. In this mode the Nyquist filter is bypassed and the video carrier is used without added delay to effectuate intercarrier conversion. In this mode the phase noise information fully cancels out and the true S/N can be measured. ASN ( dB ) = 20 x log ( Signal + Noise ) ( Noise )
MC44BS373CA Data Sheet
MC44BS373CA Modes of Operation
15 MC44BS373CA Modes of Operation
15.1 Power-On Settings
At power on, the MC44BS373CA is configured as shown in Table 25 below.
Table 25. Power-On Settings
WRITE MODE C1-High order bits C0-Low order bits FM-High order bits FL-Low order bits Bit 7 1 0 0 N5 Bit 6 0 0 0 N4 Bit 5 0 0 N11 N3 Bit 4 0 0 N10 N2 Bit 3 0 1 N9 N1 Bit 2 0 0 N8 N0 Bit 1 0 0 N7 0 Bit 0 0 0 N6 0 ACK ACK ACK ACK ACK
Note: N0 to N11 are set to have UHF oscillator on channel E36 (591.25 MHz). (See Section 15.7, "UHF PLL Section," for more information.) Peak white clip is on. Sound frequency is 5.5 MHz. Sound reference frequency is 31.25 kHz. Logic output port is low voltage. Picture-to-sound ratio is 12 dB.
15.2 Power Supply
The three device VCC pins (pins 10, 13 and 15 for SO16 package, pins 10, 15 and 17 for QFN20 package) must be applied at the same time to ensure all internal blocks are correctly biased. Do not bias any other pin before VCC is applied to the MC44BS373CA. When all VCCs are switched to 0 V, the SDA and SCL pins are high impedance.
15.3 Standby Mode
During standby mode, the modulator is switched to low power consumption. That is, the sound oscillator, UHF oscillator, and the video and sound modulator sections' bias are internally turned off. The I2C bus section remains active. The MC44BS373CA can be set to standby mode with a combination of 3 bits: OSC = 1, SO = 1, and ATT = 1.
15.4 System L or B / G Selection
The SYSL pin can be used to switch the device between system L and system B/G, as summarized in Table 26.
Table 26. System L or B/G Selection
Function Video modulation polarity Video modulation depth (% typical) Sound modulation
1 1
B/G (SYSL = 0) Negative 82 FM
L (SYSL = 1) Positive 93 AM
See Section 12, "Video Characteristics."
MC44BS373CA Data Sheet
MC44BS373CA Modes of Operation
15.5 Transient Output Inhibit
To minimize the risk of interference to other channels while the UHF PLL is acquiring a lock on the desired frequency, the sound and video modulators are turned off during a timeout period for the following cases: * * Power-on from zero (that is, all VCC switched from 0 to 5 V) UHF oscillator power-on from off state (that is, OSC bit switched from 1 to 0)
There is a timeout of 263 ms until the output is enabled. This lets the UHF PLL settle to its programmed frequency. During the 263-ms timeout, the sound PLL current source is set to 10 A typical to speed up the locking time. After the timeout, the current source is switched to 1 A. Use care when selecting loop filter components to ensure the loop transient does not exceed this delay. For test purposes, it is possible to disable the 263-ms delay using test mode1, state1.h. (This is called speed-up mode.) Table 17 provides settings pertaining to test mode 1.
15.6 UHF Oscillator--VHF range
The UHF oscillator is fully integrated and does not require any external components. For low-frequency testing or VHF range operation (test mode 1, states 1.b to 1.e) the UHF oscillator can be internally divided by 2, 4, 8, or 16.
15.7 UHF PLL Section
The reference divider is a fixed divide-by-128, resulting in a reference frequency of 31.25 kHz with a 4.0-MHz crystal. The prescaler is a fixed divide-by-8 and is permanently engaged. The programmable divider division ratio is controlled by the state of control bits N0 to N11. The divider ratio N for a desired frequency F (in MHz) is given by:
F 128 N = -- x --------8 4
with:
N = 2048 x N11 + 1024 x N10 + ...... + 4 x N2 + 4 x N1 + N0
NOTE Programming a division ratio of N = 0 is not allowed.
15.8 Logic Output Port (LOP)
The LOP pin controls any logic function. The primary applications for LOP are to control an external attenuator or an external switch between the antenna input and TV output. A typical attenuator application with PIN diode is shown in Figure 6. The LOP pin switches the PIN attenuator depending on the signal strength of the antenna input. This reduces the risk of intermodulation in certain areas. The LOP can also be used as an off position bypass switch or for other logic functions in the application.
MC44BS373CA Data Sheet
MC44BS373CA Modes of Operation
Vcc
Antenna Input
TV Out
LOP pin
Figure 6. Typical Attenuator Application with Pin Diode
15.9 Video Section--Peak White Clip
The MC44BS373CA requires the following for proper video functionality: * * A composite video input with negative going sync pulses A nominal level of 1 Vp-p
This signal is AC-coupled to the video input where the sync tip level is clamped. The video signal is then passed to a peak white clip (PWC) circuit. The PWC circuit function soft-clips the top of the video waveform, if the sync tip amplitude to peak white clip goes too high. This avoids carrier over-modulation by the video. Clipping can be disabled by software.
15.10 Test Pattern Generator
The I2C generates a simple test pattern, which can be switched under bus control to permit a TV receiver to easily tune to the modulator output. The pattern consists of two white vertical bars on a black background and a 976-Hz audio test signal.
TE2
7/10
3/10
TE1 0 10 20 24 2830 40 44 50 60 64
TIME IN S.
Figure 7. Test Pattern Generator
MC44BS373CA Data Sheet
MC44BS373CA Modes of Operation
15.11 Sound Section
The oscillator is fully integrated and does not require any external components. An internal low-pass filter and matched structure provide very low harmonics levels. The sound modulator system consists of an FM modulator incorporating the sound subcarrier oscillator. The audio input signal is AC-coupled into the amplifier, which then drives the modulator. For mono applications, the audio pre-emphasis circuit is a high-pass filter with an external capacitor and an internal resistor (106 K typical). The recommended capacitor value for BG standard (with a time constant of 50 S) is 470 pF. The recommended capacitor value for M/N standard (with a time constant of 75 S) is 750 pF. The sound reference divider is a programmable divide-by-128 or divide-by-64, resulting in a reference frequency of 31.25 kHz or 62.5 kHz with a 4.0-MHz crystal. This reference frequency can be selected by bus (bit SREF), depending on the application. For instance, when the audio bandwidth is required to be extended (for stereo application), it is possible to select the higher value (62.5 kHz) to avoid any interference between the reference and the audio signals. For stereo applications, the audio signal is already encoded in the baseband stereo encoder. It is not necessary to use a pre-emphasis, and in this case the pre-emphasis capacitor must be removed. Sometimes for the same application it is useful to increase the FM deviation. To increase FM deviation, replace the original pre-emphasis capacitor with a fixed 100-nF capacitor. Adding this value boosts the deviation and does not create a pre-emphasis. Without pre-emphasis, the audio bandwidth extends to 60 kHz. To increase the audio bandwidth at low frequencies it is recommended to change the sound PLL loop filter. It is also recommended to increase the values of the loop filter capacitors. The recommended values are 1 F and 100 nF. It is possible to create a peak for the low frequencies (from 30 to 80 Hz) by adjusting the resistor of the sound loop filter. A flat response is given with a value of 5.6 K but this value can be set to 4.7 K. This gives a peak of about 1 dB at 40 Hz and extends the low-frequency cut-off to 28 Hz. The following figure plots the resulting bandwidth for low frequencies and for the whole bandwidth (up to 60 kHz). The first chart represents the audio bandwidth for low frequencies (20 to 150 Hz) for two sets of sound loop filters. The first set with 1 F + 100 nF + 5.6 K gives a flat response. The second set with 1 F + 100 nF + 4.7 K gives a peak of about 1 dB at 60 Hz. It is possible to adjust this peak by changing the resistor value.
MC44BS373CA Data Sheet
MC44BS373CA Modes of Operation
2
0
-2
-4
dB
-6 -8 -10 -12 20 40 60 80 Hz 100 120 140
Snd filter: 1F_100nF_4K7
Snd filter: 1F_100nF_5K6
Figure 8. Audio Bandwidth Measurements (20 Hz to 150 Hz) Versus Loop Filter Components
2
0
-2
-4
dB
-6 -8 -10 -12 0 10000 20000 30000 Hz 40000 50000 60000
Figure 9. Audio Bandwidth Measurements (0 to 60 kHz) Without Pre-Emphasis
MC44BS373CA Data Sheet
High Speed I2C Compatible Bus
C1 C2
R
Figure 10. PLL Loop Filter
Loop filter equation: * * * * * *
o = ----------------------------- , Q = ------------------------------ , N x C1 R x C1 x o
Kpd x Kosc
1
with
o = 3-dB cutoff frequency
Kpd = 1-A phase detector current Kosc = 5 MHz/V sound oscillator slope. (In fact, Kosc = 40 MHz/prescaler divider = 8.) This provides 5 MHz/V. N = Sound divider ratio Q = quality factorvR Fref = 31.25 kHz N = 5.5 MHz / 31.25 kHz = 176 Assuming C1 = 1 F, then o = 168 rad, and Fo = 27 Hz
C2, added to minimize glitches, is usually set to one tenth the size of C1. For example:
Q depends on the desired frequency response. Choosing Q = 0.7 as a starting point, then R = 8.5 K. The resistance acts directly on the factor quality and can be adjusted to create a peak on the low-frequency range. It is recommended that the value of R be adjusted experimentally depending on the application and requirements.
16 High Speed I2C Compatible Bus
16.1 Specification Conditions
Each of the characteristics listed in Table 27 and Table 28 is classified as one of the following types: * * * * A--100% tested B--100% correlation tested C--Characterized on samples D--Design parameter
See Section 14, "Characterization Measurement Conditions," for each C-type parameter. Unless otherwise specified, VCC = 5.0 V, TA = 25C.
MC44BS373CA Data Sheet
High Speed I2C Compatible Bus Table 27. Electrical Characteristics
Electrical Characteristics SDA/SCL output current at 0V SDA/SCL low input level SDA/SCL high input level SDA/SCL input current for input level from 0.4 V to 0.3 VCC SDA/SCL input level SDA/SCL capacitance ACK low output level (3 mA sinking current) ACK low output level (9 mA sinking current) VIL VIH Symbol Minimum Typical Maximum -5 -- 2.1 -5 0 -- -- -- -2 -- -- -- -- -- -- -- -- 1.5 -- 5 VCC+0.3 10 0.3 0.8 Unit A V V A V pF V V Type A B B C D C C C
Table 28. Timing Characteristics
Timing Characteristics Bus clock frequency Bus free time between stop and start Setup time for start condition Hold time for start condition Data setup time Data hold time Setup time for stop condition Hold time for stop condition Acknowledge propagation delay SDA fall time at 3 ma sink I and 130-pF load SDA fall time at 3 ma sink I and 400-pF load SDA rise time SCL fall/rise time Pulse width of spikes suppressed by the input filter Tbuf Tsu;sta Thd;sta Tsu;dat Thd;dat Tsu;sto Thd;sto Tack;low Symbol Minimum 0 200 500 500 0 0 500 500 -- -- -- -- -- -- Typical -- -- -- -- -- -- -- -- -- -- -- -- -- -- Maximum 800 -- -- -- -- -- -- -- 300 50 80 300 300 50 Unit kHz ns ns ns ns ns ns ns ns ns ns ns ns ns Type C C C C C C C C C C C C C C
16.2 Timing Definitions
Stop Tbuf Start Chip Address
ACK
Start
Stop
SSDA SSCL
... ...
SDA SCL
SDA SCL
Tsu;sto
Thd;sta
Tsu;dat
Thd;dat
Tack;low
Tsu;sta
Thd;sto
Figure 11. SSDA/SSCL Timing
MC44BS373CA Data Sheet
High Speed I2C Compatible Bus
16.3 Level Definitions
SDA/SCL high and low levels are designed to be compatible with 0-5 V and 0-3.3 V SDA/SCL signals.
Vcc Vih
SDA
Vil 0V
Dead Band
Figure 12. SDA/SCL Levels
16.4 High-Speed I2C-Compatible Bus Format
SCL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 44 45
STA
Chip Address (0xCA) ACK
First Data Byte (C1 or FM) ACK
Data ACK
Stop
SDA
Figure 13. I2C Bus Timing
16.5 I2C Write-Mode Format and Bus Receiver
NOTE The information in this section concerning I2C address selection applies to the 20-pin package only. The I2C address in the 16-pin packages is set at 0xCA and cannot be changed. It is possible to select one specific I2C address from among four available addresses. This selection is controlled by an external pin (CAS) where an external resistor is connected to ground. By changing the value of this resistor it is possible to change the DC level on the multi-level CAS pin. This DC level is compared against internal thresholds (1.65, 0.42 and 2.82 V) and, depending on the result, one of the available addresses is selected according to Table 29. When chip addresses CC or C8 are selected, the DC level at the CAS pin is set by a ratio of an external resistor (33 K or 180 K 10%) and the internal pull-up resistor (85 K typical with a tolerance of 40% worst case).
Table 29. Chip Address Selected Versus CAS Pin Level
External Resistor on Pin CAS Open 180-K pull-down 33-K pull-down 0 (connected to ground) I2C address 0xCA 0xC8 0xCC 0xCE
MC44BS373CA Data Sheet
High Speed I2C Compatible Bus
The bus receiver operates the I2C-compatible data format. The chip address (I2C bus) is shown in Table 30.
Table 30. Chip Address (I2C Write Mode)
1 1 0 0 1 0 0 0 (ACK) = 0xC8 in write mode 1 1 0 0 1 0 1 0 (ACK) = 0xCA in write mode 1 1 0 0 1 1 0 0 (ACK) = 0xCC in write mode 1 1 0 0 1 1 1 0 (ACK) = 0xCE in write mode
In write mode, each ninth data bit (bits 9, 18, 27, 36, and 45) is an acknowledge bit (ACK) during which the MCU sends a logic 1 and the modulator circuit answers on the data line by pulling it low. Besides the chip address, the circuit needs 2 or 4 data bytes for operation. The sequences of data bytes shown in Table 31 are the permitted incoming information.
Table 31. Permitted Data Bytes (Incoming Information)
Example 1 Example 2 Example 3 Example 4 STA STA STA STA CA CA CA CA C1 FM C1 FM C0 FL C0 FL STO STO FM C1 FL C0 STO STO
Notes: * STA = Start condition * FM = Frequency information, high order bits * C1 = Control information, high order bits * STO = Stop condition * CA = Chip Address * FL = Frequency information, low order bits * CO = Control information, low order bits
After the chip address (CA), 2 or 4 data bytes may be received. * * If 3 data bytes are received, the third one is ignored. If 5 or more data bytes are received, the fifth and following ones are ignored, and the last ACK pulse is sent at the end of the fourth data byte.
The first and third data bytes contain a function bit, which lets the IC distinguish between frequency information and control information. If the function bit is a logic 1, the two following bytes contain control information. The first data byte after the chip address may be byte CO or byte FM. The 2 bytes of frequency information are preceded by a logic 0.
16.6 I2C Read Mode Format
The chip address (I2C bus) is shown in Table 32.
Table 32. Chip Address (I2C Read Mode)
1 1 0 0 1 0 0 1 (ACK) = 0xC9 (hex) in read mode 1 1 0 0 1 0 1 1 (ACK) = 0xCB (hex) in read mode 1 1 0 0 1 1 0 1 (ACK) = 0xCD (hex) in read mode 1 1 0 0 1 1 1 1 (ACK) = 0xCF (hex) in read mode
The incoming information consists of the read-mode chip address byte. The device then answers with an ACK followed by 1 byte containing 3 bits of status information. No acknowledge is answered by the modulator after this byte.
MC44BS373CA Data Sheet
Pin Circuit Schematics
17 Pin Circuit Schematics
VCCD VCC 50 25K 1/2 VCCD VCC 25K 1/2 VCCD VCCD
SDA
SCL
ACK VCC 5K VCC
XTAL
1.5K VCC
LOP
50k
VCC
PREM
10k 11.8k
AUDIO
AUDIO
VCC VCCD VCCD 85K VCC 600
AUXIN
VCC 20K
CAS
VCC 5K
TVOUT
SPLLFLT
75
VCC
TVOVCC
VCC VCC VCC 100
PLLFLT
2K 10K 500 10K
VIDEO
Figure 14. Pin Circuit Schematics
MC44BS373CA Data Sheet
Application Diagrams
18 Application Diagrams
18.1 BiCMOS Modulator SO16NB Mono Application
1
SCL
16
GNDD
2
SDA
15
VCCD
LOP
4 MHz Pre-em
Cx Note 1 470pF
3
LOP
14
PLLFLT
4
XTAL
13
TVOVCC
5
GND
12
TVOUT
10 nF 1nF
6
PREEM
11
GND
7
AUDIO
10
VCCA
8
SPLLFLT
9
VIDEO
220nF 100nF 22nF 15K
10nF
Audio
Figure 15. Proposed SO16 Package (Mono Application Schematic)
Notes: 1. Cx value depends on crystal characteristics. Cx = 27 pF on Motorola application board. 2. RF PLL loop filter components at pin 14 must be as close as possible to VCCD at pin 15. 3. Supply voltage decoupling capacitors must be as close as possible to ground.
MC44BS373CA Data Sheet
O Note 2 22 nF Note 3 2.2k 47nF O TVOUT Note 3 10nF 75 O Video O Vcc 100nF
SDA SCL O O
Vcc
O
O
Application Diagrams
18.2 BiCMOS Modulator SO16NB Stereo Application
1
SCL
16
GNDD
2
SDA
15
VCCD
LOP
4MHz Pre-em
Cx Note 4 Note 7
3
LOP
14
PLLFLT
4
XTAL
13
TVOVCC
5
GND
12
TVOUT
10nF 1nF
6
PREEM
11
GND
7
AUDIO
10
VCCA
8
SPLLFLT
9
VIDEO
220nF
Note 9
1 uF 100nF 3K9 to 6K2 Note 8
10nF
Audio
Figure 16. Proposed SO16 Package (Stereo Application Schematic)
Notes: 4. Cx value depends on crystal characteristics; Cx = 27 pF on Motorola application board. 5. RF PLL loop filter components at pin 14 must be as close as possible to FCC at pin 15. 6. Supply voltage decoupling capacitors must be as close as possible to ground. 7. For a stereo application, the audio signal is already encoded in the baseband stereo encoder. It is not necessary to create a pre-emphasis and in this case the pre-emphasis capacitor has to be removed. Sometimes for the same application it is useful to increase the FM deviation. To increase FM deviation, replace the original pre-emphasis capacitor with a 100-nF capacitor. Adding this kind of value boosts the deviation and does not create a pre-emphasis. 8. It is possible to create a peak for the low frequencies (from 30 to 80 Hz) by adjusting the resistor of the sound loop filter. A flat response is given with a value of 5.6 K but this value can be set to 4.7 K. This gives a peak of about 1 dB at 40 Hz and extends the low-frequency cut-off at 28 Hz. The value of the audio input series capacitor has been increased in order to have a lower cut-off frequency. 9. The value of the audio input series capacitor has been increased in order to have a lower cutoff frequency.
MC44BS373CA Data Sheet
O Note 5
SDA SCL O O
Vcc
2.2k
22nF
Note 6
O
O
47nF
O TVOUT Note 6 10nF
75 O Video O Vcc
100nF
Application Diagrams
18.3 BiCMOS Modulator QFN20 Mono Application
GNDD
PLLFLT
SDA
SCL
VCCD
10nF
TVOVCC TVOUT NC
Note 12 O TVOUT
LOP
LOP
20 1 2 3
19
18
17 16 15 14 13
Note 13 CAS 4MHz Pre-em 470pF
XTAL
1nF
Cx Note 10
GND
GND
4
PREEM
12
NC
5 6
SPLLFLT AUDIO
11 7
AUXIN
8
VIDEO
9
10
VCCA
Note 12 10nF O 10nF Video 75
100nF Audio 22nF
O
220nF 15K
Figure 17. Proposed QFN20 Package (Mono Application Schematic)
Notes: 10. Cx value depends on crystal characteristics; Cx = 27 pF on Motorola application board 11. RF PLL loop filter components at pin 16 must be as close as possible to FCC at pin 17. 12. Supply voltage decoupling capacitors must be as close as possible to ground. 13. Chip address select pin open (default I2C address = 0xCA).
MC44BS373CA Data Sheet
O
SCL O SDA O
22nF 47nF
2.2k
Note 11 Vcc
O
Vcc O 1uF
Application Diagrams
18.4 BiCMOS Modulator QFN20 Stereo Application
GNDD
PLLFLT
SDA
SCL
VCCD
LOP
LOP
20 1 2 3 4
19
18
17 16 15 14 13
TVOVCC TVOUT NC GND
10nF Note 16 1nF O TVOUT
4MHz Pre-em
Note 19 CAS XTAL Cx Note 14 470pF Note 17 220nF Audio
O
GND
12
NC
PREEM
5 6
SPLLFLT AUDIO
11 7
AUXIN
8
VIDEO
9
10
1uF 100nF
Note 16 10nF O 10nF Video 75 O Vcc
VCCA
Note 18 3K9 to 6K2
Figure 18. Proposed QFN20 Package (Stereo Application Schematic)
Notes: 14. Cx value depends on crystal characteristics; Cx = 27 pF on Motorola application board. 15. RF PLL loop filter components at pin 16 must be as close as possible to FCC at pin 17. 16. Supply voltage decoupling capacitors must be as close as possible to ground. 17. For a stereo application, the audio signal is already encoded in the baseband stereo encoder. It is not necessary to create a pre-emphasis and in this case the pre-emphasis capacitor has to be removed. Sometimes for the same application it is useful to increase the FM deviation by replacing the original pre-emphasis capacitor with a 100-nF capacitor. Adding this value boosts the deviation and does not create a pre-emphasis. 18. It is possible to create a peak for the low frequencies (from 30 to 80 Hz) by adjusting the sound loop filter resistor. A flat response is given with a value of 5.6 K but this value can be set to 4.7 K. This gives a peak of about 1 dB at 40 Hz and extends the low-frequency cut-off at 28 Hz (see audio section). 19. Chip address select pin open (default I2C address = 0xCA) The value of the audio input series capacitor has been increased in order to have a lower cut-off frequency.
MC44BS373CA Data Sheet
O
SCL O SDA O
22nF 47nF
2.2k
Note 15 Vcc
O
1 uF
MC44BS373CA Evaluation Board Schematic and Layout
19 MC44BS373CA Evaluation Board Schematic and Layout
19.1 SO16NB Board PCB Layout
Figure 19. Evaluation Board PCB Layout (SO16NB Package)
MC44BS373CA Data Sheet
MC44BS373CA Evaluation Board Schematic and Layout
19.2 SO16NB Board Schematic
Figure 20. Evaluation Board Schematic (SO16NB Package)
MC44BS373CA Data Sheet
MC44BS373CA Evaluation Board Schematic and Layout
19.3 QFN20 Board PCB Layout
Top Layer
Figure 21. Evaluation Board PCB Layout (QFN20 Package)
MC44BS373CA Data Sheet
MC44BS373CA Evaluation Board Schematic and Layout
Bottom Layer
Figure 22. Evaluation Board PCB Layout (QFN20 Package)
MC44BS373CA Data Sheet
MC44BS373CA Evaluation Board Schematic and Layout
19.4 QFN20 Board Schematic
Figure 23. Evaluation Board Schematic (QFN20 Package)
MC44BS373CA Data Sheet
Packaging Instructions
20 Packaging Instructions
Tape and reel packaging is per 12MRH00360A issue Y with the following conditions applicable for dual in-line SOP (SOIC) package and quad flat pack no lead square (QFN).
Figure 24. Dual In-line SOP (SOIC)
Component orientation: Arrange parts with the pin-1 side closest to the tape's round sprocket holes on the tape's trailing edge.
Figure 25. Quad Flat Pack No Lead Square
Moisture sensitivity levels are as follows: * * * MC44BS373CAD,R2--Moisture sensitivity level 1, no dry pack required MC44BS373CAFC,R2 lead free packages--Moisture sensitivity level 3, dry pack required MC44BS373CAEF,R2 lead free packages--Moisture sensitivity level 3, dry pack required
MC44BS373CA Data Sheet
Marking Instructions
21 Marking Instructions
21.1 SO16 NB Marking
Bar marked part way across pin 1 end of package. Bar width 10 to 20 mils, length to be at least four times bar width. Bar placement may extend across chamfer and dimple areas.
MCBS373CA
AWLYWW
Pin 1 Dot or Dimple * * 1st line: M44BS373CA (Part number coded on 10 digits) 2nd line: Assembly site code AW (2 digits) followed by the wafer lot code L (1 digit), year Y (1 digit) and work week WW (2 digits)
21.2 SO16 NB Lead Free Marking
Bar marked part way across pin 1 end of package. Bar width 10 to 20 mils, length to be at least four times bar width. Bar placement may extend across chamfer and dimple areas.
MBS373CAEF
AWLYWW
Pin 1 Dot or Dimple * * 1st line: M44BS373CA (Part number coded on 10 digits) 2nd line: Assembly site code AW (2 digits) followed by the wafer lot code L (1 digit), year Y (1 digit) and work week WW (2 digits)
21.3 QFN20 Marking
Compliant with 12MRH00191A specification for package code 126.
* 1st line: M73CA (Part number coded on 4 digits) 2nd line: ALYW (Assembly site code A (1 digit) wafer lot code L (1 digit), year Y (1 digit) and work week W (1 digit)
M73CA
(M)
*
MC44BS373CA Data Sheet
Case Outlines
22 Case Outlines
22.1 SO16 Case
Millimeters Dim Min A A1 D E E1 b c e L h Q 1.35 0.1 9.8 5.8 3.8 0.35 0.19 0.4 0.25 0
o
Inches Min 0.054 0.004 0.385 0.229 0.150 0.014 0.008 0.016 0.010 0
o
Note: 1994. Note:
1. Dimensions and Tolerances per ASME Y14.5M, 2. Controlling dimension: Millimeters.
Max 1.75 0.25 10 6.2 4 0.49 0.25 1.25 0.5 7
o
Max 0.068 0.009 0.393 0.244 0.157 0.019 0.009 0.049 0.019 7o
Note: 3. Dimensions D and E1 do not include mold protrusion. Note: 4. Maximum mold protrusion 0.15 (0.006) per side. Note: 5. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.127 (0.005) total in excess of the b dimension at maximum material condition.
1.27 BSC
0.050 BSC
Figure 26. SO16NB Package
MC44BS373CA Data Sheet
Case Outlines
22.2 QFN20 Case
1 OF 4
Figure 27. QFN20 Package (1 of 4)
MC44BS373CA Data Sheet
Case Outlines
2 OF 4
Figure 28. QFN20 Package (2 of 4)
MC44BS373CA Data Sheet
Case Outlines
3 OF 4
Figure 29. QFN20 Package (3 of 4)
MC44BS373CA Data Sheet
Case Outlines
4 OF 4
Figure 30. QFN20 Package (4 of 4)
MC44BS373CA Data Sheet
Document Revision History
23 Document Revision History
Table 33 provides a revision history for this data sheet.
Table 33. Document Revision History
Rev. No. 2.5 Date 05/14/2004 Non-technical edits Tables reformatted Added note nine to Figure 16 Corrected resistor values from 56 K to 5.6 K and from 47 K to 4.7 K in: * Notes to Figure 16 and Figure 18 * Section 15.11, "Sound Section" Corrected capacitor labeling in Figure 10 Corrected settings for picture-to-sound ratio in Table 22 (PS bit settings were reversed) Added label for note 17 on Figure 18 Removed pin numbers from Figure 2 Removed warnings from Figure 15, Figure 16, Figure 17, and Figure 18 Corrected spelling of pin SPLLFLT (was SPLFLT) Changed operating temperature range from 0-70 to -20-85. Added note to section 16 stressing that I2C address selection is not available for the 16-pin packages Substantive Change(s)
2.6
05/26/2004
06/16/2004
MC44BS373CA Data Sheet
Document Revision History
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MC44BS373CA Data Sheet
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